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XC5VFX70T-2FFG665I 360 I/O 550MHz IC FPGA

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XC5VFX70T-2FFG665I 360 I/O 550MHz IC FPGA

Name: XC5VFX70T2FFG665I 360 IO 550MHz IC FPGA
Brand: Xilinx Inc.
Price: 2000 USD

Brand Name : Xilinx Inc.

Model Number : XC5VFX70T-2FFG665I

Certification : Lead free / RoHS Compliant

MOQ : 1 pcs

Price : USD 2000~3000 pcs

Payment Terms : T/T, Western Union, Paypal, Trade Assurance, Credit Card

Supply Ability : 186 pcs

Delivery Time : 3-5 Day

Packaging Details : International Standard Packaging

Category : Programmable Logic ICs

Condition : Original 100%,Brand New and Original,New

Number of I/Os : 360 I/O

Product : Virtex-5

Package / Case : FBGA-665

Distributed RAM : 820 kbit

Embedded Block RAM - EBR : 5328 kbit

Maximum Operating Frequency : 550 MHz

Service : BOM Kitting

Lead time : In Stock,contact us

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XC5VFX70T-2FFG665I IC FPGA FBGA-665 360 I/O 550 MHz Virtex-5

Product Attribute	Attribute Value
Manufacturer:	Xilinx
Product Category:	FPGA - Field Programmable Gate Array
Product:	Virtex-5
Number of I/Os:	360 I/O
Operating Supply Voltage:	1 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 100 C
Mounting Style:	SMD/SMT
Package / Case:	FBGA-665
Data Rate:	6.5 Gb/s
Series:	XC5VFX70T
Brand:	Xilinx
Distributed RAM:	820 kbit
Embedded Block RAM - EBR:	5328 kbit
Maximum Operating Frequency:	550 MHz
Moisture Sensitive:	Yes
Number of Transceivers:	16 Transceiver
Product Type:	FPGA - Field Programmable Gate Array
Factory Pack Quantity:	1
Subcategory:	Programmable Logic ICs
Tradename:	Virtex

550 MHz Integrated Block Memory

• Up to 16.4 Mbits of integrated block memory
• 36-Kbit blocks with optional dual 18-Kbit mode
• True dual-port RAM cells

• Independent port width selection (x1 to x72)
− Up to x36 total per port for true dual port operation
− Up to x72 total per port for simple dual port operation (one Read port and one Write port)
− Memory bits plus parity/sideband memory support for x9, x18, x36, and x72 widths
− Configurations from 32K x 1 to 512 x 72 (8K x 4 to 512 x 72 for FIFO operation)

• Multirate FIFO support logic
− Full and Empty flag with fully programmable Almost Full and Almost Empty flags

Summary of Virtex-5 FPGA Features

• Up to six Clock Management Tiles (CMTs)
− Each CMT contains two DCMs and one PLL—up to eighteen total clock generators
− Flexible DCM-to-PLL or PLL-to-DCM cascade
− Precision clock deskew and phase shift
− Flexible frequency synthesis
− Multiple operating modes to ease performance trade-off decisions
− Improved maximum input/output frequency
− Fine-grained phase shifting resolution
− Input jitter filtering
− Low-power operation
− Wide phase shift range

• Differential clock tree structure for optimized low-jitter clocking and precise duty cycle
• 32 global clock networks
• Regional, I/O, and local clocks in addition to global clocks

XC5VFX70T-2FFG665I 360 I/O 550MHz IC FPGA

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XC5VFX70T-2FFG665I 360 I/O 550MHz IC FPGA Images

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XC5VFX70T-2FFG665I 360 I/O 550MHz IC FPGA

XC5VFX70T-2FFG665I 360 I/O 550MHz IC FPGA

XC5VFX70T-2FFG665I

550MHz IC FPGA

360 I/O IC FPGA

XC5VFX70T-2FFG665I 360 I/O 550MHz IC FPGA Images